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Shape simulation method allowing simulation of processed shape during steps of manufacturing a semiconductor device in a short period of time

机译:形状模拟方法,允许在短时间内制造半导体器件的步骤中模拟加工后的形状

摘要

An area to which volume ratio "1" as allotted in an analysis area is divided into first and second types of cells. A third cell is placed next to and above the first cell, and volume ratio "0" is allotted to the third cell. With respect to the direction in which the third and first cells are placed next to each other, both cells are adapted to have the same width. As a result, by interpolation of the volume ratio, the position at which volume ratio assumes 0.5 is positioned at the boundary between cells.
机译:在分析区域中分配给其体积比“ 1”的区域被分为第一类型的单元格和第二类型的单元格。将第三单元放置在第一单元的旁边和上方,并将体积比“ 0”分配给第三单元。关于第三单元和第一单元彼此相邻放置的方向,两个单元都适于具有相同的宽度。结果,通过对体积比进行插值,使体积比为0.5的位置位于单元之间的边界处。

著录项

  • 公开/公告号US5812435A

    专利类型

  • 公开/公告日1998-09-22

    原文格式PDF

  • 申请/专利权人 MITSUBISHI DENKI KABUSHIKI KAISHA;

    申请/专利号US19970810169

  • 发明设计人 MASATO FUJINAGA;

    申请日1997-02-28

  • 分类号G06G7/48;

  • 国家 US

  • 入库时间 2022-08-22 02:38:34

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