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Phase lock loop circuit having a broad loop band and small step frequency

机译:具有宽环带和小步进频率的锁相环电路

摘要

A phase lock loop circuit includes an oscillator, a digital mixer, a comparator, a loop amplifier, and a low-pass filter. The oscillator has an oscillation frequency controlled by a control voltage. The digital mixer is constituted by a digital element to output a difference frequency signal between an oscillation output from the oscillator and an input mixing signal. The comparator compares at least the phase of the difference frequency signal output from the digital mixer with that of a reference frequency signal, and outputs a difference signal. The loop amplifier and the low-pass filter generate the control voltage for the voltage controlled oscillator on the basis of the difference signal output from the comparator.
机译:锁相环电路包括振荡器,数字混频器,比较器,环路放大器和低通滤波器。振荡器具有由控制电压控制的振荡频率。数字混频器由数字元件构成,以输出从振荡器输出的振荡与输入混频信号之间的差频信号。比较器至少将从数字混频器输出的差频信号的相位与参考频率信号的相位进行比较,并输出差信号。环路放大器和低通滤波器基于从比较器输出的差信号来产生用于压控振荡器的控制电压。

著录项

  • 公开/公告号US5831481A

    专利类型

  • 公开/公告日1998-11-03

    原文格式PDF

  • 申请/专利权人 NEC CORPORATION;

    申请/专利号US19970805501

  • 发明设计人 TOSHIYUKI OGA;

    申请日1997-02-26

  • 分类号H03L7/185;

  • 国家 US

  • 入库时间 2022-08-22 02:38:14

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