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Dual band phase locked loop frequency synthesizer for wireless communication, has divide by three circuit allowing use of same oscillator circuit to get center and offset frequencies in phases added and subtracted by mixer

机译:用于无线通信的双频带锁相环频率合成器具有三分频电路,允许使用同一振荡器电路来获得混频器相加和相减的中心频率和失调频率

摘要

The synthesizer has an oscillator circuit (VCO) (10) generating a frequency at an output of the circuit. A quadrature divide by three circuit (20) is coupled to the output of the oscillator circuit to generate an offset frequency at the output of the oscillator circuit. A double quadrature mixer is coupled to the output of the oscillator and the divide by three circuits to generate either of the output frequencies. The divide by three circuit allows utilization of the same VCO to get the center and the offset frequencies in quadrature phases that are added and subtracted by the mixer.
机译:合成器具有振荡器电路(VCO)(10),该振荡器电路在电路的输出处产生频率。正交三分频电路(20)耦合到振荡器电路的输出,以在振荡器电路的输出处产生偏移频率。双正交混频器耦合到振荡器的输出,并与三个电路相除,以产生任一输出频率。三分频电路允许利用相同的VCO来获得正交相位的中心频率和失调频率,这些频率由混频器相加或相减。

著录项

  • 公开/公告号DE102005019786A1

    专利类型

  • 公开/公告日2006-11-09

    原文格式PDF

  • 申请/专利权人 NEWLOGIC TECHNOLOGIES AG;

    申请/专利号DE20051019786

  • 发明设计人 WIDERIN PETER;

    申请日2005-04-28

  • 分类号H04B1/26;H03L7/18;H03B19/00;

  • 国家 DE

  • 入库时间 2022-08-21 21:20:20

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