METHOD OF FORMING GATE LEVEL INTERCONNECTION IN INTEGRATED CIRCUIT, GATE LEVEL INTERCONNECTION INTEGRATED CIRCUIT, AND METHOD FOR CONTROLLING FLUORINE CONCENTRATION WHOLE LEVEL IN GATE LEVEL INTERCONNECTION

摘要

PROBLEM TO BE SOLVED: To reduce abnormal oxidation, dense formation of tungsten nucli, and formation of silicide nucli by a method, wherein a first silicide layer on a gate level interconnection is formed on a polycrystalline layer utilizing a first chemical deposition process, and a second silicide layer is formed on the first silicide layer utilizing a second chemical deposition process. ;SOLUTION: A first Wsi_x layer 320 is deposited on a polycrystalline silicon layer 316 at a temperature range of 350 to 550°C through a first chemical deposition process, in which silane and tungsten hexafluoride are used as a source gas. A second Wsi_x layer 324 is deposited on the first Wsi_x layer 320 through a second chemical deposition process where dichlorosilane and tungsten hexafluoride are used as a source gas. With this process, abnormal oxidation, formation of dense tungsten nucli, and the formation of silicide nucli can be reduced. Consequently, a silicide film can be formed in side a gate structure 304 which does not abnormal oxidation or deterioration to the gate structure 304.;COPYRIGHT: (C)1999,JPO