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Microprocessor, microprocessor system, and method of operation of the last-in, first-out stack with a last-in, first-out stack

机译:微处理器,微处理器系统以及具有后进先出堆栈的后进先出堆栈的操作方法

摘要

A microprocessor (50) includes a main central processing unit (CPU) (70) and a separate direct memory access (DMA) CPU (72) in a single integrated circuit making up the microprocessor (50). The main CPU (70) has a first 16 deep push down stack (74), which has a top item register (76) and a next item register (78), respectively connected to provide inputs to an arithmetic logic unit (ALU) (80) by lines (82) and (84). An output of the ALU (80) is connected to the top item register (76) by line (86). The output of the top item register at (82) is also connected by line (88) to an internal data bus (90). A loop counter (92) is connected to a decrementer (94) by lines (96) and (98). The loop counter (92) is bidirectionally connected to the internal data bus (90) by line (100). Stack pointer (102), return stack pointer (104), mode register (106) and instruction register (108) are also connected to the internal data bus (90) by lines (110), (112), (114) and (116), respectively. The internal data bus (90) is connected to memory controller (118) and to gate (120). The gate (120) provides inputs on lines (122), (124), and (126) to X register (128), program counter (130) and Y register (132) of return push down stack (134). IMAGE
机译:微处理器(50)在构成微处理器(50)的单个集成电路中包括主中央处理单元(CPU)(70)和单独的直接存储器访问(DMA)CPU(72)。主CPU(70)具有前16个深度下推堆栈(74),该堆栈具有顶部项目寄存器(76)和下一个项目寄存器(78),分别连接以向算术逻辑单元(ALU)提供输入( 80)行(82)和(84)。 ALU(80)的输出通过线(86)连接到顶层寄存器(76)。 (82)的最顶部寄存器的输出也通过线(88)连接到内部数据总线(90)。循环计数器(92)通过线(96)和(98)连接到减量器(94)。回路计数器(92)通过线路(100)双向连接到内部数据总线(90)。堆栈指针(102),返回堆栈指针(104),模式寄存器(106)和指令寄存器(108)也通过线(110),(112),(114)和()连接到内部数据总线(90)。 116)。内部数据总线(90)连接到存储器控制器(118)和门(120)。门(120)将在线(122),(124)和(126)上的输入提供给返回下推堆栈(134)的X寄存器(128),程序计数器(130)和Y寄存器(132)。 <图像>

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