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AMPLIFYING SEMICONDUCTOR ELEMENT, MANUFACTURE THEREOF AND AMPLIFYING SEMICONDUCTOR DEVICE

机译:放大半导体元件,制造其并放大半导体器件

摘要

PROBLEM TO BE SOLVED: To suppress the adjacent channel leak power at a low voltage below specified value, thereby operating at a high efficiency by comprising a field effect transistor having specified relation between a threshold voltage Vth and operating voltage. ;SOLUTION: The operating voltage is a drain voltage Vdr, specified relation includes a relation Vdr≤|Vth|, Vdr=1.0-3.5 V and Vth=-2.5--4.5 V. The amplifying semiconductor element FET 1 has an n-layer 1, n+-layer 2 on a semiinsulative GaAs substrate 20 surface, gate electrode 7 on the layer 1, multilayer electrode 5 on the layer 2 and feed electrode 11 formed thereon, including a source electrode pad 11s and drain electrode pad 11d with SnN layers 3, 8 laminated on both sides of the n+-layer 2 as insulation films. This suppresses the adjacent channel leak power below specified value and ensures a high-efficiency operation.;COPYRIGHT: (C)1998,JPO
机译:解决的问题:通过包括具有在阈值电压Vth和工作电压之间具有指定关系的场效应晶体管,以低于指定值的低电压抑制相邻沟道的泄漏功率,从而以高效率工作。 ;解决方案:工作电压是漏极电压Vdr,指定的关系包括关系Vdr≤Vth&vbar,Vdr = 1.0-3.5 V,Vth = -2.5--4.5V。放大半导体元件FET 1具有n-在半绝缘GaAs衬底20表面上的层1,n + -层2,在层1上的栅电极7,在层2上的多层电极5和在其上形成的馈电电极11,包括源电极焊盘如图11s所示,在n + 层2的两侧层叠有SnN层3、8作为绝缘膜的漏极焊盘11d。这样可以将相邻通道的泄漏功率抑制在规定值以下,并确保高效运行。;版权所有:(C)1998,JPO

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