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DEVICE AND METHOD FOR VERIFYING RELIABILITY OF SEMICONDUCTOR INTEGRATED CIRCUIT AND STORAGE MEDIUM STORED WITH VERIFYING PROGRAM
DEVICE AND METHOD FOR VERIFYING RELIABILITY OF SEMICONDUCTOR INTEGRATED CIRCUIT AND STORAGE MEDIUM STORED WITH VERIFYING PROGRAM
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机译:验证存储有验证程序的半导体集成电路和存储介质的可靠性的装置和方法
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摘要
PROBLEM TO BE SOLVED: To securely verify an object circuit without any omission even when the scale of the circuit is large by guaranteeing reliability to switching noise in partial circuit units extracted from the semiconductor integrated circuit. SOLUTION: A partial network detection part 90 extracts information on a partial network consisting of a channel connected component and its driven circuit and stores the information in a partial network storage part 50. A maximum resistance calculation part 100 calculates the maximum resistance at the time of the operation of the channel connected component from the information regarding the partial network and stores it in a maximum resistance storage part 60 and a gate capacitance calculation part 110 calculates the total gate capacitance of the part of the driven circuit except an inverter from the information regarding the partial network and stores it in a gate capacitance storage part 70. An error decision part 120 calculates the value of an evaluation function from the stored information regarding the maximum resistance and the information regarding the total gate capacitance and decides whether or not design standards regarding switching noise are unsatisfied.
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