首页> 外国专利> Differential encoding device in cable modem

Differential encoding device in cable modem

机译:电缆调制解调器中的差分编码设备

摘要

The present invention relates to a differential encoding apparatus in a cable modem, and is comprised of a difference bit calculator and a 2-bit digital storage element.;In this case, the difference bit calculator performs a differential encoding of the digital signal, and the 2-bit digital storage element performs a function of delaying the output signal of the difference bit calculator by one period and then returning it to the input terminal of the difference bit calculator .;The difference bit calculator comprises a first multiplexer for outputting the upper bits of the differential coded signal for the digital signal and a second multiplexer for outputting the lower bits in the first embodiment.;On the other hand, in the second embodiment, the two-bit signals to be subjected to differential encoding are denoted by C1 and C0, the signals output one cycle before by the differential bit calculator are denoted by P1 and P0, and the exclusive OR gate element is defined by XOR , XOR1 receiving P1 and P0, XOR2 receiving C1 and C0 as input signals, XOR3 receiving P1 and C1 as input signals, and inverter device receiving XOR4 and XOR1 output signals receiving input signals as P0 and C0 as input signals An AND gate element for receiving the output signal of XOR2 and the output signal of the inverter element as an input signal, the output signal of the AND gate element and XOR5 receiving the output signal of XOR3 as an input signal, and the output signal of the AND gate element and the output signal of XOR4 As an input signal.
机译:电缆调制解调器中的差分编码设备技术领域本发明涉及电缆调制解调器中的差分编码设备,包括差分位计算器和2位数字存储元件。在这种情况下,差分位计算器对数字信号执行差分编码,并且2位数字存储元件执行将差分位计算器的输出信号延迟一个周期,然后将其返回到差分位计算器的输入端子的功能。差分位计算器包括用于输出高位的第一多路复用器。在第一实施例中,用于数字信号的差分编码信号的位和用于输出低位的第二多路复用器。另一方面,在第二实施例中,要进行差分编码的两位信号用C1表示。和C0,由差分位计算器输出的一个周期之前的信号由P1和P0表示,异或门元素由XOR定义,XOR1 re接收到P1和P0,XOR2接收C1和C0作为输入信号,XOR3接收P1和C1作为输入信号,反相器设备接收XOR4和XOR1输出信号,接收输入信号作为P0和C0作为输入信号AND门元件用于接收输出XOR2的信号和反相器元件的输出信号作为输入信号,AND门元件和XOR5的输出信号接收XOR3的输出信号作为输入信号,AND门元件的输出信号和输出信号XOR4的输入作为输入信号。

著录项

  • 公开/公告号KR19990075331A

    专利类型

  • 公开/公告日1999-10-15

    原文格式PDF

  • 申请/专利权人 전주범;

    申请/专利号KR19980009477

  • 发明设计人 제갈헌;

    申请日1998-03-19

  • 分类号H04B14/06;

  • 国家 KR

  • 入库时间 2022-08-22 02:16:36

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号