Test pattern generation method for automatic test equipment for integrated circuit testing device

摘要

The method provides a compressed set of test sequences by defining a list of faults (702) and generating a test sequence (704) defining the input signals to allow a given fault to be detected, with insertion of the test sequence in a test sequence list (708,714) and identification of the corresponding fault. Each new test sequence for each fault is compared with the list to detect when two test sequences can be combined to provide the compressed set. An Independent claim is also included for a test pattern generation device.