process for the manufacture of high-voltage and low-voltage cmos transistors on a single integrated schaltungs chip

摘要

A process for forming both low-voltage CMOS transistors and high-voltage CMOS transistors on a common integrated circuit chip uses a common implantation and drive-in step to form both the n-type well (174,374) of each PMOS transistor and the n-type drain extension well (274) of each lightly-doped drain (LDD) NMOS transistor and a separate implant and drive-in to form the p-type drain extension well (182) of each LDD PMOS transistor.