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Option setting circuit, and integrated circuit with this option setting circuit

机译:选项设置电路以及具有该选项设置电路的集成电路

摘要

PURPOSE: To prevent the different option states caused after a application of a power supply despite the presence of many option items by latching the option data which are outputted from 8 nonvolatile memory with application of the power supply through the use of a latch circuit. ;CONSTITUTION: The option data are previously written and stored in a nonvolatile memory 20. This operation is carried out in sequence for all memories. When a power supply is applied for use of an IC, these option data are outputted from the memories 20 through a transistor 25 and then given to an option latch circuit 8 via an amplifier circuit 32. When the power supply is turned off, the date given to the circuit 8 are erased. In this case, however, the data stored in the memory 20 are never erased and therefore instantaneously outputted when the power supply is applied again. Then the data are latched by the circuit 8. plural I/O circuits 1 and their corresponding memories 20 are properly provided in accordance with the number of option items. Thus plural. items are set optionally and at one time.;COPYRIGHT: (C)1993,JPO&Japio
机译:用途:通过使用闩锁电路,通过锁存从8个非易失性存储器输出的选项数据,在使用电源的情况下,尽管存在许多选项,也可以防止在施加电源后导致的不同选项状态。 ;构成:选项数据已预先写入并存储在非易失性存储器20中。此操作对所有存储器依次执行。当为IC使用电源时,这些选项数据通过晶体管25从存储器20输出,然后通过放大器电路32提供给选项锁存电路8。当电源关闭时,日期提供给电路8的信号被擦除。然而,在这种情况下,永远不会擦除存储在存储器20中的数据,并因此在再次施加电源时立即输出。然后,数据被电路8锁存。根据选项的数量适当地提供了多个I / O电路1及其对应的存储器20。因此复数。项目可随意设置,一次即可。版权所有:(C)1993,JPO&Japio

著录项

  • 公开/公告号DE69228459T2

    专利类型

  • 公开/公告日1999-09-30

    原文格式PDF

  • 申请/专利权人 ROHM CO. LTD. KYOTO;

    申请/专利号DE1992628459T

  • 发明设计人 MASUMOTO HIROAKI;

    申请日1992-10-08

  • 分类号G11C7/00;

  • 国家 DE

  • 入库时间 2022-08-22 02:11:29

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