RISC MICRO-PROCESSING ARCHITECTURE WITH MORE REGISTERS OF DIFFERENT TYPES

摘要

The invention provides a processor and method for efficiently utilizing register file resources. The processor comprises an execution unit that performs at least one operation according to an instruction; a first register set including a plurality of first registers each for holding integer data; and a second register set including a plurality of second registers each for holding said integer data and for holding floating point data, wherein said instruction specifies which of said first and second register sets is to be accessed, and wherein said execution unit accesses said first register set or said second register set as specified by said instruction, reads an operand value from either said first register set or second register set as specified by said instruction, and writes an result value to said first register set or said second register set as specified by said instruction. IMAGE