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RISC microprocessor architecture implementing multiple typed register sets

机译:RISC微处理器体系结构,实现了多种类型的寄存器集

摘要

Disclosed herein is an apparatus that implements multiple typed register sets, and applications thereof. The apparatus includes an execution unit and a register file. The execution unit is configured to execute instructions including one or more fields. The register file is configured to store operands defined by the one or more fields and is configured to store results of execution of the instructions in a destination defined by the one or more fields. The register file includes (i) a first register set having a register configured to store data of a single data type and (ii) a second register set having a register configured to store data of a plurality of data types. The register file is responsive to the one or more fields in at least one of the instructions to retrieve an operand of the at least one of the instructions from, or to store a result of the at least one of the instructions into, one of the registers of the first register set or the second register set as defined by the one or more fields of the at least one of the instructions.
机译:本文公开了一种实现多种类型的寄存器组的装置及其应用。该设备包括执行单元和寄存器文件。执行单元被配置为执行包括一个或多个字段的指令。寄存器文件被配置为存储由一个或多个字段定义的操作数,并且被配置为将指令的执行结果存储在由一个或多个字段定义的目的地中。寄存器文件包括(i)具有配置用于存储单一数据类型的数据的寄存器的第一寄存器组,以及(ii)具有配置用于存储多种数据类型的数据的寄存器的第二寄存器组。寄存器文件响应于至少一条指令中的一个或多个字段,以从至少一条指令中检索至少一条指令的操作数,或将至少一条指令的结果存储到其中之一。由至少一条指令的一个或多个字段定义的第一寄存器组或第二寄存器组的寄存器。

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