首页>
外国专利>
Single-chip synchronous dynamic random access memory (DRAM) system including first address generator operable in first and second modes
Single-chip synchronous dynamic random access memory (DRAM) system including first address generator operable in first and second modes
展开▼
机译:单芯片同步动态随机存取存储器(DRAM)系统,包括可在第一和第二模式下运行的第一地址生成器
展开▼
页面导航
摘要
著录项
相似文献
摘要
To obtain high access speed regardless of a structure and operating characteristics of an external central processing unit (CPU), a synchronous dynamic random access memory (DRAM) system includes first and second DRAM cell arrays, and a first address generator for outputting a first address and a second address respectively to the first and second DRAM cell arrays simultaneously in a first mode. In a second mode, the first address generator outputs the first address and the second address respectively to the first and second DRAM cell arrays sequentially.
展开▼