首页> 外国专利> Ti/titanium nitride and ti/tungsten nitride thin film resistors for thermal ink jet technology

Ti/titanium nitride and ti/tungsten nitride thin film resistors for thermal ink jet technology

机译:用于热喷墨技术的Ti /氮化钛和Ti /氮化钨薄膜电阻

摘要

The present invention provides a structure and a method of manufacturing a resistor in a semiconductor device and especially for a resistor in an ink jet print head. The method begins by providing a substrate 10 having a field oxide region 20 surrounding an active area. The field oxide region 20 has an ink well region 52. Also a transistor is provided in the active area. The transistor comprises a source 12, drain 14 and gate electrode 16 18 19. A dielectric layer 24 is formed over the field oxide region 20 and the transistor 12 14 16 18. The dielectric layer 24 has contact openings over the source 12 and drain 14. A resistive layer 26 27 is formed over the dielectric layer 24 and contacting the source 12 and drain 14. The resistive layer 26 27 is preferably comprised of two layers of: a Titanium layer 26 under a titanium nitride 27 or a titanium layer 26 under a tungsten nitride layer 27. A first metal layer 28 is formed over the resistive layer. The metal layer 28 is patterned forming an first opening 29 over a portion of the resistive layer 28 over the ink well region 52. The resistive layer and first metal layer are patterned forming a second opening 31 over the gate electrode 16 18 and forming the resistive layer and first metal layer into an interconnect layer. A passivation layer 30 is then formed over the first metal layer 28, the resistive layer 26 27 in the ink well region 52, and the gate electrode 16 18.
机译:本发明提供一种制造半导体器件中的电阻器的结构和方法,特别是用于喷墨打印头中的电阻器的制造方法。该方法开始于提供具有围绕有源区域的场氧化区域20的衬底10。场氧化物区域20具有墨阱区域52。在有源区域中还设有晶体管。该晶体管包括源极12,漏极14和栅电极16 1819。在场氧化物区域20和晶体管12 14 16 18上方形成介电层24。介电层24在源极12和漏极14上方具有接触开口。电阻层26 27形成在介电层24上并与源极12和漏极14接触。电阻层26 27优选包括两层:在氮化钛27下面的钛层26或在氮化钛27下面的钛层26。氮化钨层27。在电阻层上方形成第一金属层28。图案化金属层28,从而在墨水阱区域52上方的电阻层28的一部分上形成第一开口29。图案化电阻层和第一金属层,以在栅电极16 18上方形成第二开口31,并形成电阻层。层和第一金属层形成互连层。然后在第一金属层28,墨阱区52中的电阻层26 27和栅电极16 18上方形成钝化层30。

著录项

  • 公开/公告号US5870121A

    专利类型

  • 公开/公告日1999-02-09

    原文格式PDF

  • 申请/专利权人 CHARTERED SEMICONDUCTOR MANUFACTURING LTD.;

    申请/专利号US19970947829

  • 发明设计人 LAP CHAN;

    申请日1997-10-08

  • 分类号B41J2/05;

  • 国家 US

  • 入库时间 2022-08-22 02:08:42

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号