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Method for generating an improved model for evaluating the operation of an integrated circuit design

机译:生成用于评估集成电路设计的操作的改进模型的方法

摘要

Modeling of propagation delay and output transition time by use of fitting functions comprised of standard Taylor series and inverse powers is disclosed. These components are used as a basis for generating an equation that predicts circuit performance over a wide range of input transition and output capacitive loads. The present invention includes a computer implemented method for adding functions to the fitting functions or removing functions from the fitting functions until an acceptable error limit has been reached.
机译:公开了通过使用包括标准泰勒级数和逆幂的拟合函数对传播延迟和输出过渡时间建模。这些组件用作生成方程式的基础,该方程式可在广泛的输入过渡和输出电容性负载范围内预测电路性能。本发明包括一种计算机实现的方法,用于向拟合功能添加功能或从拟合功能中删除功能,直到达到可接受的误差极限为止。

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