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SRAM having improved soft-error immunity
SRAM having improved soft-error immunity
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机译:具有改进的抗软错误性的SRAM
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摘要
An SRAM cell having improved soft error immunity connects each of the storage nodes of the SRAM cell to an overlying electrode having a textured surface which is separated from a constant potential plate electrode by a dielectric layer. The textured surface of the overlying electrode may be created by forming hemispherical-grained silicon on its surface, or by forming a fin structure on its surface. The textured surface of the overlying electrode provides increased capacitance between the overlying electrode and the constant potential plate electrode, thereby increasing the capacitance of the storage node.
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