Method of making SOI circuit for higher temperature and higher voltage applications

摘要

Method for forming a CMOS transistor in a silicon layer positioned above an underlying buried oxide layer including isolating a first active area and a second active area; forming an n-well and a p- well having specified back gate threshold voltages; forming gates over the wells; forming a lightly doped drain region in the p-well that extends through the silicon layer; and implanting ions to form a source and a drain region in the p-well to provide a lightly doped drain drift region.