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LOGIC CIRCUIT PREVENTING OPERATION ANALYSIS AND LOGIC CIRCUIT DEVICE

机译:逻辑电路预防操作分析和逻辑电路装置

摘要

PROBLEM TO BE SOLVED: To make the illegal analysis of the operation of a logic circuit to be difficult and to apply the method of illegal analysis to a general logic circuit by changing the inner logic constitution of the logic circuit, in accordance with the outer control signal of a prescribed logic circuit. ;SOLUTION: A logic circuit 101 has logic gates G1,..., G4, G10, and G11, EXNOR gates G5,..., G9 and a NOT gate G12. The logic gates G1,..., and G4 are the logic gates, which can switch a two input NAND function and a two input NOR function by a control signal C. The logic gates G10 and G11 are the logic gates, which can switch a two input EXNOR function and a two input EXOR function by the control signal C. When the switching of the logic constitution is controlled, based on the control signal C of random numbers synchronized with input signals A1, A2 and Ci, an inner node signal can be changed at random.;COPYRIGHT: (C)2000,JPO
机译:要解决的问题:使逻辑电路操作的非法分析变得困难,并通过根据外部控制改变逻辑电路的内部逻辑结构,将非法分析方法应用于一般逻辑电路规定逻辑电路的信号。解决方案:逻辑电路101具有逻辑门G1,...,G4,G10和G11,异或门G5,...,G9和非门G12。逻辑门G1,...和G4是逻辑门,可以通过控制信号C切换两个输入NAND功能和两个输入NOR功能。逻辑门G10和G11是可以切换的逻辑门当通过控制信号C控制两个输入EXNOR功能和两个输入EXOR功能时。当控制逻辑结构的切换时,基于与输入信号A1,A2和Ci同步的随机数的控制信号C,内部节点信号可以随机更改。;版权:(C)2000,JPO

著录项

  • 公开/公告号JP2000151389A

    专利类型

  • 公开/公告日2000-05-30

    原文格式PDF

  • 申请/专利权人 NIPPON TELEGR & TELEPH CORP NTT;

    申请/专利号JP19980333448

  • 发明设计人 FUJII KOJI;

    申请日1998-11-09

  • 分类号H03K19/20;G06F7/58;H04L9/10;

  • 国家 JP

  • 入库时间 2022-08-22 01:58:58

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