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Test pattern design device for verification and test pattern design manner for verification

机译:用于验证的测试图案设计装置以及用于验证的测试图案设计方式

摘要

Abstract Topic The test in order to verify the circuit operation of the electronic circuitYou design pattern and you input efficiently. Solutions Trust to each terminal of the electronic circuit which verifies operationThe input station from 2 which gives the entry specification of the number and input station 2Following to the entry specification, tesutopa which controls test pattern creationTang creation means various from of 5 and test pattern creation means 5The operation treatment which does the operation treatment of the test pattern design by instructionDevice tesutopata which is the treatment result of 3 and operation central processing unit 3Tabular format for entry of n (length: Pattern number side: Terminal nameTable) corrugated format of scope and entry result (length: Terminal name side: PasThe time chart of tang number) the output device which displays the scopete which has with 1, is based on the design process of test patternWay you can design strike pattern, the signal of test patternTo input in the scope of the tabular format, the entry result with corrugated format the scopeIt displays.
机译:<摘要> <主题>为了验证电子电路的电路操作而进行的测试设计图案并有效输入。解决方案信任对电子线路的每个端子进行验证的操作输入站从2给出编号的输入规范,输入站2从输入规范开始,tesutopa控制测试图案的创建tang生成方式从5种到测试图案的不同5用指令3进行处理的指令设备tesutopata和运算中央处理单元3对测试图案设计进行运算处理的运算处理表格形式n输入(长度:图案编号侧:端子名称表)的波纹格式范围和输入结果(长度:端子名称侧:Pas柄脚编号的时间表)显示带有1的示波器的输出设备,基于测试图案的设计过程您可以设计触击图案,测试图案的信号来输入表格格式的范围,瓦楞纸格式的输入结果将显示在范围内。

著录项

  • 公开/公告号JP2990155B1

    专利类型

  • 公开/公告日1999-12-13

    原文格式PDF

  • 申请/专利权人 NIPPON DENKI TSUSHIN SHISUTEMU KK;

    申请/专利号JP19980154134

  • 发明设计人 KONDO SHUNSUKE;

    申请日1998-06-03

  • 分类号G01R31/3183;G06F11/22;G06F17/50;

  • 国家 JP

  • 入库时间 2022-08-22 01:58:00

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