The polymer stud grid array has a 3-dimensional substrate (S) of an electrically insulating polymer, with a flat surface provided with polymer studs (PS), each having an external terminal (AA). Electrical conductor paths couple the external terminals to internal terminals (IA1), connected to the terminals of a semiconductor chip (C1) mounted on the substrate. Pref. the moulding and metallisation of the polymer studs is effected using moulded interconnection device technology, without requiring additional steps.
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