AN IMPROVED METHOD OF PLANARIZING THIN FILM LAYERS DEPOSITED OVER A COMMON CIRCUIT BASE

摘要

A method for forming a planarized thin film (74) dielectric film on a surface of a common circuit base (60) upon which one or more integrated circuits are to be attached. The common circuit base includes raised features (68) formed over its surface such that the raised features define a trench area (66) between them. The method includes the steps of forming a first layer (62) of the dielectric film over the common circuit base and over the raised features and the trench, then patterning the newly formed layer to remove portions of the layer formed over the raised features and expose the raised features. After the layer is patterned, formation of the dielectric film is completed by forming a second layer (74) of the dielectric film over the patterned first layer. Additional film deposition and film patterning steps are performed to complete the layout of a thin film interconnect structure over said common circuit base, and an integrated circuit die is attached to the common circuit base and electrically connecting to the thin film interconnect structure. In a preferred embodiment, the first and second layers of the dielectric film are both formed from a photo-definable material and the patterning step includes exposing the first layer to light through a patterned mask corresponding to the raised features and developing the exposed layer with a developing solution to etch away portions of the first layer formed over the raised features.