Provision of accurate and complete communication between different bus architectures

摘要

The present invention provides hardware logic within a host bridge 20 that connects a CPU local bus 36 to a peripheral bus 22 that determines if data to be transmitted on the CPU local bus is non-contiguous and, if so, substitutes contiguous data for the non-contiguous data to ensure that the CPU local bus does not malfunction.Simultaneously, the inventive hardware translates data transfers between a peripheral bus that is limited by its architecture to data strings of a standard length and a CPU local bus that permits dynamic bus sizing.