METHOD FOR DEADLOCK RESOLUTION AND COMPUTER SYSTEM DEADLOCK REQUEST RESOLUTION

摘要

One or more shared storage controller (SC's) a plurality of central processing unit (CP's) in the multiprocessor system consisting of input and output adapter requestor (requestor) between the potential deadlock (potential deadlock) the detection and to avoid connected to discloses a hardware mechanism were (開 示). It needs to go to each of the storage controller SC is originated in the main internal sources such as hardware equipment that is used to fetch and store processing between the memory (source) as well as external sources, such as CP's, input and output adapter, the other SC. All requirements must be used to prioritize the leaderboard rankings determined before starting the run should be prioritized. Particular order of demand may lead to a deadlock (deadlock), require that the lock-out (locking out) or that has a lower priority because they use their priority cycle demand having a high priority, and any priority level, After a busy required resources necessary for the completion of other requirements is having. Herein in a deadlock resolution mechanism described in the present invention, checking the request register valid bit and uses the time pulses (timed pulse) a part of the pulse is used to detect the hang-up in the SC, the request is completed in the storage controller check the length of time spent in a valid state is not. A request register valid bit is turned on (on) for, when the two received pulse time is set in the internal latch hang-up detection. If at some point, whether the valid bit is reset, the detection logic and the internal hangup detection latch is reset. When the internal hangup detection latch set, the ongoing demand until the demand inside the hang-up is detected completion is allowed to be completed, a new request is pending in an inactive state (inactive state).