CIRCUIT FOR DECREASING THE EFFECT OF A PARASITIC BIPOLAR TRANSISTOR DURING ELECTROMAGNETIC DISCHARGE AND A METHOD THEREOF

摘要

PURPOSE: A circuit for decreasing the effect of a parasitic bipolar transistor during electromagnetic discharge and a method thereof are provided to increase a margin to an eSD shielding circuit before a breakdown occurs. CONSTITUTION: A circuit for decreasing the effect of a parasitic bipolar transistor during electromagnetic discharge includes a terminal, a current source, a first resistive device, and a first transistor. The first node is coupled to the terminal. The current source includes a second node supplying current responding to the electromagnetic discharge on the nodes. The first resistive source includes first and second nodes. The first node is coupled to a first voltage reference node. The second node is coupled to the second node of the current source. A first current node is coupled to the terminal. The second current node includes to a control gate, and the first current node.