首页> 外国专利> NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE HAVING ELECTRICALLY ERASABLE AND PROGRAMMABLE MEMORY CELLS OF PLATE CELL STRUCTURE AND PROGRAM METHOD THEREOF

NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE HAVING ELECTRICALLY ERASABLE AND PROGRAMMABLE MEMORY CELLS OF PLATE CELL STRUCTURE AND PROGRAM METHOD THEREOF

机译:具有板状细胞结构的电可擦除和可编程存储单元的非易失性半导体存储器件及其程序方法

摘要

PURPOSE: An NAND type flash memory device having a plate cell structure is provided to lower a voltage applied to a booster plate when a program is operated. CONSTITUTION: The flash memory device includes a cell array(100), a section decoder(120), a block decoder(110) and a booster plate(102). The cell array electrically erasable and programmable memory cells having a source, a drain, a floating gate and a control gate, and a conductive layer covering the memory cells. The section decoder supplies the first voltage to the control gate of a cell being addressed of the memory cells. The block decoder supplies the second voltage to the conductive layer after the control gate of the addressed memory cell is sufficiently charged to the first voltage. When the second voltage is applied to the conductive layer, the booster plate makes it possible doing so that the voltage of the control gate is boosted by the second voltage by cutting that the first voltage is applied to the control gate.
机译:目的:提供一种具有板单元结构的NAND型闪存器件,以在程序运行时降低施加到升压板的电压。组成:闪存设备包括一个单元阵列(100),一个分区解码器(120),一个块解码器(110)和一个升压板(102)。单元阵列电可擦可编程存储器单元具有源极,漏极,浮置栅极和控制栅极以及覆盖该存储器单元的导电层。区段解码器将第一电压提供给存储单元中要寻址的单元的控制栅极。在被寻址的存储单元的控制栅极被充分充电到第一电压之后,块解码器将第二电压提供给导电层。当将第二电压施加到导电层时,升压板使得可以这样做,从而通过切断将第一电压施加到控制栅极来使控制栅极的电压被第二电压升高。

著录项

  • 公开/公告号KR100252476B1

    专利类型

  • 公开/公告日2000-04-15

    原文格式PDF

  • 申请/专利权人 SAMSUNG ELECTRONICS CO LTD.;

    申请/专利号KR19970019239

  • 发明设计人 LEE DONG-KEE;JUNG TAE-SUNG;

    申请日1997-05-19

  • 分类号G11C16/00;

  • 国家 KR

  • 入库时间 2022-08-22 01:44:52

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