Memory cell array, especially dynamic random access memory cell array, production comprises insulation removal from only one side wall of a recess by non-masked etching to allow adjacent cell transistor formation

摘要

A conductive structure (L, L') is configured in a recess (V, V') in such a way, that it is adjacent to the substrate (1, 2) at one section of a second edge (F2, F2') of said recess (V, V') and that it is also separated from said substrate (1, 2) by an insulation (I1, I1') which is provided in the recess (V, V'). The insulation (I1, I1') is first created in such a way, that it completely separates the conductive structure (L, L') from the substrate (1, 2). A section, located above the conductive structure (L, L'), of a first edge (F1, F1') of the recess (V, V') which lies opposite the second edge (F2, F2'), is implanted with oxygen, using oblique implantation. Thermal oxidation produces an insulating structure (I2, I2') which covers the insulation (I1, I1') on the first edge (F1, F1') from above, but does not cover the insulation (I1, I1') on the second edge (F2, F2'). This allows a section of the insulation (I1, I1') located on the second edge (F2, F2'), to be removed by an unmasked etching process and to be replaced by a conductive material. The conductive structure (L, L') is thus enlarged and lies adjacent to the substrate (1, 2).