首页> 外国专利> MOS transistor is designed such that resistance in the ON state is identical to that in specific electrode connecting supply voltage to source electrode, resulting in constant output impedance, despite manufacturing defects

MOS transistor is designed such that resistance in the ON state is identical to that in specific electrode connecting supply voltage to source electrode, resulting in constant output impedance, despite manufacturing defects

机译:MOS晶体管的设计使其在导通状态下的电阻与将电源电压连接到源电极的特定电极的电阻相同,从而尽管存在制造缺陷,但仍可保持恒定的输出阻抗

摘要

The transistor (111) has an ON-state resistance. Its specific electrode (131) connects the source electrode (113) to a supply voltage section (123). This is supplied with a voltage or energy. Its resistance is identical to the ON-state resistance, and its width is identical to a width of the gate electrode (117). The specific electrode (131) and the gate electrode (117) are formed simultaneously. An independent claim is included for the method of manufacture.
机译:晶体管(111)具有导通状态的电阻。其特定电极(131)将源电极(113)连接到电源电压部分(123)。它被提供有电压或能量。其电阻与导通状态的电阻相同,并且其宽度与栅电极(117)的宽度相同。同时形成特定电极(131)和栅电极(117)。该制造方法包括独立权利要求。

著录项

  • 公开/公告号DE10004200A1

    专利类型

  • 公开/公告日2000-08-10

    原文格式PDF

  • 申请/专利权人 NEC CORP. TOKIO/TOKYO;

    申请/专利号DE2000104200

  • 发明设计人 OHNO TSUYOSHI;

    申请日2000-02-01

  • 分类号H01L29/78;H01L21/336;H01L27/092;

  • 国家 DE

  • 入库时间 2022-08-22 01:41:56

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