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Doped polysilicon to retard boron diffusion into and through thin gate dielectrics

机译:掺杂多晶硅以阻止硼扩散进入薄栅极电介质并穿过薄栅极电介质

摘要

An embodiment of the instant invention is a method of fabricating a semiconductor device which includes a dielectric layer situated between a conductive structure and a semiconductor substrate, the method comprising the steps of: forming the dielectric layer (layer 14) on the semiconductor substrate (substrate 12); forming the conductive structure (structure 18) on the dielectric layer; doping the conductive structure with boron; and doping the conductive structure with a dopant which inhibits the diffusion of boron. The semiconductor device may be a PMOS transistor or a capacitor. Preferably, the conductive structure is a gate structure. The dielectric layer is, preferably, comprised of a material selected from the group consisting of: an oxide, an oxide/oxide stack, an oxide/nitride stack, and an oxynitride. Preferably, the dopant which inhibits the diffusion of boron comprises at least one group III or group IV element. More specifically, it is preferably comprised of: carbon, germanium, and any combination thereof. Preferably, the steps of doping the conductive structure with boron and doping the conductive structure with a dopant which inhibits the diffusion of boron are accomplished substantially simultaneously, or the step of doping the conductive structure with boron is preformed prior to the step of doping the conductive structure with a dopant which inhibits the diffusion of boron are accomplished substantially simultaneously.
机译:本发明的实施例是一种制造半导体器件的方法,该半导体器件包括位于导电结构和半导体衬底之间的介电层,该方法包括以下步骤:在半导体衬底(衬底)上形成介电层(层14)。 12);在介电层上形成导电结构(结构18);用硼掺杂导电结构;并用抑制硼扩散的掺杂​​剂掺杂导电结构。半导体器件可以是PMOS晶体管或电容器。优选地,导电结构是栅极结构。介电层优选地由选自以下的材料构成:氧化物,氧化物/氧化物堆叠,氧化物/氮化物堆叠和氧氮化物。优选地,抑制硼扩散的掺杂​​剂包含至少一种III族或IV族元素。更具体地,其优选地包括:碳,锗及其任意组合。优选地,用硼掺杂导电结构和用抑制硼扩散的掺杂​​剂掺杂导电结构的步骤基本上同时完成,或者用用硼掺杂导电结构的步骤在掺杂导电剂的步骤之前进行。基本上同时完成具有抑制硼扩散的掺杂​​剂的结构。

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