首页> 外国专利> All-digital minimal jitter frequency synthesizer incorporating an improved pulse stripping method to reduce spurious tones

All-digital minimal jitter frequency synthesizer incorporating an improved pulse stripping method to reduce spurious tones

机译:全数字最小抖动频率合成器,具有改进的脉冲剥离方法,可减少杂音

摘要

An all-digital frequency synthesizing system that will eliminate spurious frequencies that degrade the overall performance of the generation of a binary waveform. The frequency synthesizing system has a count series retention table that contains a series of count integers that are selected by a count signal that chooses which series of the integers are to be linked to a periodic reference counter. The periodic reference counter will count a number of periods of a periodic reference frequency and when the counter has reached the number of counts that is equal to the number of the count integer, the periodic output signal will be toggled from logic level to another logic level. A new periodic output signal period can be chosen by selecting a new series of count integers in the count retention table. A count compiler will create the series of count integers retained in the count retention table. The series of count integers will be disbursed in a manner to eliminate spurious frequencies from the periodic output signal.
机译:全数字频率合成系统,将消除会降低二进制波形生成整体性能的杂散频率。频率合成系统具有一个计数系列保留表,该表包含一系列计数整数,这些计数整数由计数信号选择,该计数信号选择要链接到周期参考计数器的整数序列。周期性参考计数器将对周期性参考频率的周期进行计数,并且当计数器达到等于计数整数的数量的计数时,周期性输出信号将从逻辑电平切换到另一个逻辑电平。可以通过在计数保留表中选择一系列新的计数整数来选择新的周期性输出信号周期。计数编译器将创建保留在计数保留表中的一系列计数整数。计数整数系列将以消除周期输出信号中的杂散频率的方式分配。

著录项

  • 公开/公告号US6127859A

    专利类型

  • 公开/公告日2000-10-03

    原文格式PDF

  • 申请/专利权人 TRITECH MICROELECTRONICS LTD.;

    申请/专利号US19990277559

  • 发明设计人 SHIANG LIANG LIM;

    申请日1999-03-26

  • 分类号H04L27/20;

  • 国家 US

  • 入库时间 2022-08-22 01:36:03

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