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Method and apparatus for cache line prediction and prefetching using a prefetch controller and buffer and access history
Method and apparatus for cache line prediction and prefetching using a prefetch controller and buffer and access history
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机译:使用预取控制器以及缓冲区和访问历史记录进行高速缓存行预测和预取的方法和装置
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摘要
A microprocessor includes an execution engine, a prediction table cache, and a prefetch controller. The execution engine is adapted to issue a memory request. The memory request includes an identifier corresponding to a row location in an external main memory. The prediction table cache is adapted to store a plurality of entries defining an access history of previously encountered memory requests. The prediction table cache is indexed by the identifier. The prefetch controller is adapted to receive the memory request and generate at least one prefetch candidate based on the memory request and the access history. A method for prefetching data in a microprocessor includes receiving a memory request. The memory request includes an identifier corresponding to a row location in an external main memory. The memory request is compared to an access history of previously encountered memory requests. The access history is indexed by the identifier. At least one prefetch candidate is generated based on the memory request and the access history.
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