Van der pauw structure to measure the resistivity of a doped area under diffusion areas and gate structures

摘要

The present invention provides a van der Pauw semiconductor test structure for and a method of testing a resistivity of a doped area formed within a substrate of a semiconductor wafer which may be under a diffusion area or a gate structure. The test structure can include field oxide regions formed on a surface of the substrate and a base doped substrate formed within the substrate. Further, the test structure includes a first primary tub and secondary tubs that are formed within the base doped substrate, each of the secondary tubs having a first diffusion region formed adjacent to an inner isolation structure and a second diffusion region formed adjacent to an outer isolation structure. A second primary tub is located adjacent the first primary tub and a dielectric layer is formed over the substrate having contacts formed within the dielectric layer and between the isolation structures. Further still, the test structure may include a gate structure as part of the semiconductor test structure, with the gate structure having openings formed therein through which the contacts extend to the first diffusion regions and the second diffusion regions.