PURPOSE: To reduce the size of a data converter by minimizing the volume of a memory element by storing a plurality of LUTs in one memory element and converting data by utilizing the LUTs. ;CONSTITUTION: A first address generating section 45 successively generates first addresses 453 for selecting LUTs (lookup tables) stored in a ROM 49 correspondingly to a conversion mode. A second address generating section 43 generates a second address 433 for selecting a small area in a selected LUT selected with the first address in accordance with a conversion level. A third address generating section 41 generates a third address 413 for selecting converting data in a small block selected with the first and second addresses 453 and 433. A synchronization control section 47 generates a synchronizing signal 473 for meeting the synchronization among the first, second, and third addresses 453, 433, and 413. Therefore, the size of a data converter can be reduced by minimizing the volume of the ROM 49.;COPYRIGHT: (C)1995,JPO
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