首页> 外国专利> CIRCUIT ANALYZER, CIRCUIT ANALYSIS METHOD AND COMPUTER READABLE RECORDING MEDIUM WITH CIRCUIT ANALYSIS PROGRAM RECORDED THEREON

CIRCUIT ANALYZER, CIRCUIT ANALYSIS METHOD AND COMPUTER READABLE RECORDING MEDIUM WITH CIRCUIT ANALYSIS PROGRAM RECORDED THEREON

机译:电路分析仪,电路分析方法和记录有电路分析程序的计算机可读记录介质

摘要

PROBLEM TO BE SOLVED: To solve such a problem that the setting of connection information is difficult and requires much time since the specifying operation of an interface change parameter is performed to a circuit diagram while a conventional circuit simulation device adopts an interface change parameter specifying method for circuit element connection information. ;SOLUTION: Connection source substrate layout design data to be the origin of inter- substrate connection setting and connection destination substrate layout design data to be the end point of the inter-substrate connection setting are selected/extracted from a substrate layout design data storage/display part for storing/displaying plural substrate layout design data respectively and further, connection source and connection destination substrate identification names are extracted from respective extracted results. Also, connection component information for performing the substrate connection setting is selected and extracted from the connection source and connection destination substrate layout design data respectively, the substrate identification names of the connection source and the connection destination and the connection component information are integrated and inter-substrate connection information is generated. Further, waveform analysis information is extracted from the substrate layout design data of the connection source and the connection destination respectively, the waveform analysis information is synthesized to inter-substrate waveform analysis information, based on the inter-substrate connection information, and waveform analysis is performed, base on the synthesized inter-substrate waveform analysis information.;COPYRIGHT: (C)2001,JPO
机译:解决的问题:由于在传统电路仿真装置采用接口改变参数指定方法的同时,对电路图执行接口改变参数的指定操作,因此解决了连接信息的设置困难并且需要大量时间的问题。用于电路元件连接信息。 ;解决方案:从基板布局设计数据存储/中选择/提取作为基板间连接设置的起点的连接源基板布局设计数据和作为基板间连接设置的终点的连接目标基板布局设计数据。显示部分别用于存储/显示多个基板布局设计数据,并且,从各个提取结果中提取连接源和连接目的地基板识别名。此外,分别从连接源和连接目的地基板布局设计数据中选择并提取用于执行基板连接设置的连接组件信息,连接源和连接目的地的基板标识名称以及连接组件信息被整合并且相互之间。生成基板连接信息。此外,分别从连接源和连接目的地的基板布局设计数据中提取波形分析信息,基于基板间连接信息将波形分析信息合成为基板间波形分析信息,并且进行波形分析。基于合成的基片间波形分析信息执行。;版权所有:(C)2001,JPO

著录项

  • 公开/公告号JP2001188821A

    专利类型

  • 公开/公告日2001-07-10

    原文格式PDF

  • 申请/专利权人 MITSUBISHI ELECTRIC CORP;

    申请/专利号JP20000000431

  • 发明设计人 YAMAMOTO EIJI;ASAKAWA TADATAKA;

    申请日2000-01-05

  • 分类号G06F17/50;G06F3/00;

  • 国家 JP

  • 入库时间 2022-08-22 01:27:19

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