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SEMICONDUCTOR DEVICE WITH AN INTEGRATED CMOS CIRCUIT WITH MOS TRANSISTORS HAVING SILICON-GERMANIUM (Si1-xGex) GATE ELECTRODES, AND METHOD OF MANUFACTURING SAME
SEMICONDUCTOR DEVICE WITH AN INTEGRATED CMOS CIRCUIT WITH MOS TRANSISTORS HAVING SILICON-GERMANIUM (Si1-xGex) GATE ELECTRODES, AND METHOD OF MANUFACTURING SAME
Semiconductor device comprising an integrated CMOS circuit with NMOS and PMOS transistors (A, B) having semiconductor zones (23, 24, 29, 30) formed in a silicon substrate (1). At the locations of the gate zones (29, 30), the surface (3) of the substrate is provided with a layer of gate oxide (11) on which gate electrodes (16, 17) are formed. The gate electrodes (17) of the PMOS transistors (B) are formed in a layer of p-type doped polycrystalline silicon (14) and a layer of p-type doped polycrystalline silicon-germanium(13) (Si1-xGex; 0x1) sandwiched between the silicon-germanium layer and the gate oxide. The gate electrodes (16) of the NMOS transistors (A) are formed in a layer of n-type doped polycrystalline silicon (14) without germanium. The integrated CMOS circuit combines advantages of PMOS transistors having p-type doped silicon-germanium gate electrodes with advantages of NMOS transistors having n-type doped silicon gate electrodes.
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机译:半导体器件,包括具有NMOS和PMOS晶体管(A,B)的集成CMOS电路,该晶体管具有在硅衬底(1)中形成的半导体区域(23、24、29、30)。在栅极区域(29、30)的位置处,基板的表面(3)设置有栅极氧化物层(11),在栅极氧化物层上形成有栅极电极(16、17)。 PMOS晶体管(B)的栅电极(17)形成在p型掺杂的多晶硅(14)的层和p型掺杂的多晶硅锗(13)的层中(Si1-xGex; 0 < x <1)夹在硅锗层和栅极氧化物之间。 NMOS晶体管(A)的栅电极(16)形成在没有锗的n型掺杂多晶硅(14)的层中。集成CMOS电路结合了具有p型掺杂的硅锗栅电极的PMOS晶体管的优点和具有n型掺杂的硅栅电极的NMOS晶体管的优点。
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