首页>
外国专利>
METHOD FOR INCREASING THE VERY-LARGE-SCALE-INTEGRATED VLSI CAPACITOR SIZE ON BULK SILICON AND SILICON-ON-INSULATOR SOI WAFERS AND STRUCTURE FORMED THEREBY
METHOD FOR INCREASING THE VERY-LARGE-SCALE-INTEGRATED VLSI CAPACITOR SIZE ON BULK SILICON AND SILICON-ON-INSULATOR SOI WAFERS AND STRUCTURE FORMED THEREBY
展开▼
机译:散装硅和绝缘硅上硅片上超大型集成的VLSI电容器尺寸的增大方法及其结构
展开▼
页面导航
摘要
著录项
相似文献
摘要
PURPOSE: A method for manufacturing a semiconductor device is provided to form an inexpensive capacitor without additional cost, and to increase the density of the capacitor by increasing a ratio of a silicon width to an interval between adjacent islands so that a sub-lithography characteristic is patterned. CONSTITUTION: At least one conductive island having a predetermined sidewall angle in a conductive substrate is formed. A dielectric material is formed on at least one conductive island. A conductive material is formed on the dielectric material. A contact between the conductive material and at least one conductive island is formed.
展开▼