首页>
外国专利>
A sampled amplitude read channel employing a trellis sequence detector matched to a channel code constraint and a post processor for correcting errors in the detected binary sequence using the signal samples and an error syndrome
A sampled amplitude read channel employing a trellis sequence detector matched to a channel code constraint and a post processor for correcting errors in the detected binary sequence using the signal samples and an error syndrome
A sampled amplitude read channel for a disk storage system including an encoder / decoder to implement a high rate channel code that codes a specific minimum distance error event of a trellis sequence detector by enhancing special code limitations. amplitude read channel is described. The lattice-sequential detector has a state machine matched to the code limit that effectively removes the corresponding minimum distance error from the detected output sequence. In addition, the channel code encodes redundancy bits in the recording data to implement an error detection code. The extra bits are processed during the read operation to produce an error syndrome that is used to detect and correct other dominant error events, such as NRZ (+) and (+ - +) error events. In this way, the most probable error event of the lattice sequential detector is coded by the channel code limit, or detected and corrected using the error syndrome. As a result, the present invention provides significant distance enhancement performance gains over the prior art without reducing the code rate of the system, thereby providing a substantial increase in linear bit density and overall storage capacity.
展开▼