首页> 外国专利> A sampled amplitude read channel employing a trellis sequence detector matched to a channel code constraint and a post processor for correcting errors in the detected binary sequence using the signal samples and an error syndrome

A sampled amplitude read channel employing a trellis sequence detector matched to a channel code constraint and a post processor for correcting errors in the detected binary sequence using the signal samples and an error syndrome

机译:采样幅度读取通道,采用与通道代码约束匹配的网格序列检测器和后处理器,用于使用信号样本和错误校正子来校正检测到的二进制序列中的错误

摘要

A sampled amplitude read channel is disclosed for disk storage systems comprising a encoder/decoder for implementing a high rate channel code that codes out specific minimum distance error events of a trellis sequence detector by enforcing a particular code constraint. The trellis sequence detector comprises a state machine matched to the code constraint which effectively removes the corresponding minimum distance errors from the detected output sequence. Additionally, the channel code encodes redundancy bits into the write data for implementing an error detection code. The redundancy bits are processed during a read operation to generate an error syndrome used to detect and correct other dominant error events, such as the NRZ (+) and (+-+) error events. In this manner, the most likely error events of the trellis sequence detector are either coded out by the channel code constraint, or detected and corrected using the error syndrome. As a result, the present invention provides a significant distance enhancing performance gain over the prior art without decreasing the system's code rate, thereby providing a substantial increase in linear bit density and overall storage capacity.
机译:公开了一种用于磁盘存储系统的采样幅度读取通道,该磁盘存储系统包括编码器/解码器,该编码器/解码器用于实施高速率通道代码,该高速率通道代码通过实施特定的代码约束来对格状序列检测器的特定最小距离误差事件进行编码。格栅序列检测器包括与代码约束匹配的状态机,该状态机有效地从检测到的输出序列中消除了相应的最小距离误差。另外,通道代码将冗余位编码到写数据中,以实现检错码。在读取操作期间处理冗余位,以生成用于检测和纠正其他主要错误事件(例如NRZ(+)和(+-+)错误事件)的错误校正子。以这种方式,网格序列检测器的最可能的错误事件或者通过信道代码约束被编码出来,或者使用错误校正子被检测和纠正。结果,本发明与现有技术相比提供了显着的距离增强的性能增益,而没有降低系统的编码率,从而大大增加了线性比特密度和总存储容量。

著录项

  • 公开/公告号KR100658382B1

    专利类型

  • 公开/公告日2006-12-18

    原文格式PDF

  • 申请/专利权人

    申请/专利号KR20017001284

  • 申请日2001-01-30

  • 分类号G06F11/08;

  • 国家 KR

  • 入库时间 2022-08-21 20:39:31

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