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Viterbi decoder and synchronization / non-synchronization detection device therefor

机译:维特比解码器及其同步/非同步检测装置

摘要

A viterbi decoder includes a maximum branch metric value detecting device separated from a feedback loop consisting of an ACS arithmetic unit, a normalization arithmetic unit, and a state value storing device. In operation, a maximum branch metric value is detected by utilizing the output of the state value storing device, to thereby enhance operating speed. Further, a judgment is made as to whether a state having the minimum state value at an immediately preceding time is back-traceable from a state having the minimum state value at a current time by using survivor path information. Non-back-traceable non-correspondences are then detected, and the number of occurrences of non-correspondences are counted. If the occurrences of non-correspondences exceed a reference value, it is judged a non-synchronization. In another method, synchronization/non-synchronization is judged by detecting whether a trace back is possible, without utilizing survivor path information.
机译:维特比解码器包括与反馈回路分离的最大分支度量值检测装置,该反馈回路包括ACS运算单元,归一化运算单元和状态值存储装置。在操作中,通过利用状态值存储设备的输出来检测最大分支度量值,从而提高了操作速度。此外,通过使用幸存者路径信息,做出关于在紧接在前时间具有最小状态值的状态是否可以从当前在当前时间具有最小状态值的状态回溯的判断。然后检测不可追溯的不对应,并计算不对应的出现次数。如果不对应的发生超过参考值,则判断为不同步。在另一种方法中,在不利用幸存者路径信息的情况下,通过检测回溯是否可能来判断同步/非同步。

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