首页> 外国专利> Lsi - method for their design, the according to the draft of the layout and the circuit of a detailed part never time planning errors with influence on the entire specification of an lsi - function produces

Lsi - method for their design, the according to the draft of the layout and the circuit of a detailed part never time planning errors with influence on the entire specification of an lsi - function produces

机译:Lsi-他们的设计方法,根据布局图和详细零件的电路永远不会计划错误而影响lsi-函数的整个规范的产生

摘要

An lsi - method for their design contains (a) performing a arrangement wiring, which is attached to a plurality of macroblocks, (b) performing a time planning analysis on the plurality of macroblocks on the basis of the result of the wiring arrangement and (c) the design of an inner part of each of the macro blocks on the basis of the result of the time planning analysis.
机译:一种用于它们的设计的方法包括:(a)执行布置布线,该布线连接到多个宏块,(b)根据布线布置的结果对多个宏块执行时间规划分析,以及( c)根据时间计划分析的结果设计每个宏块的内部。

著录项

  • 公开/公告号DE10014489A1

    专利类型

  • 公开/公告日2001-01-18

    原文格式PDF

  • 申请/专利权人 NEC CORPORATION TOKIO/TOKYO JP;

    申请/专利号DE2000114489

  • 发明设计人 KATO FUMIYASU TOKIO/TOKYO JP;

    申请日2000-03-23

  • 分类号G06F17/50;H01L21/82;

  • 国家 DE

  • 入库时间 2022-08-22 01:09:52

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