Circuit for transmitting data with constant bit rate has FIFO before each multiplexer or coupling field input, free association of multiplexer input signal bits to transmission data stream

摘要

The circuit has a multiplexer or time-position coupling field and First-In-First-Outs on the transmission side, with a FIFO before each multiplexer or coupling field input. There is a free association of the multiplexer input signal bits to the transmission data stream. The FIFOs have independent read-in and read-out clocks. The circuit can be implemented as hardware and under program control with microprocessors and memory modules. Independent claims are also included for the following: a method of linking signal rate timing to transmission rate timing and a method of linking signal frame timing to transmission frame timing.