Circuit arrangement for combining bit flows (bit streams) of a plurality of time-division-multiplex input lines, which are operated in bit-serial form, onto a supermultiplex line which is operated in bit-parallel form, and for distribution of the bit flow of such a supermultiplex line onto a plurality of time-division-multiplex output lines which are operated in bit-serial form

摘要

Circuit arrangements of this type are required, for example, in the case of PCM time-division-multiplex exchanges, in the case of which switching array (switching matrix, switching network, switching stage) assemblies are provided in the switching array, which switching array assemblies produce (by means of pure time position conversion) both time and spatial allocation from time channels which are formed on time-division-multiplex input lines to time channels which are formed on time-division-multiplex output lines. As a result of the use of line-specific serial/parallel converters and parallel/serial converters, known arrangements of this type are costly (complex) and require a large amount of space. According to the invention, more favourable conditions in this respect are achieved in that a multiplexer (M) is provided in one transmission direction on the side of the single multiplex lines (LE0, LE31), and the serial/parallel conversion takes place on the side of the supermultiplex line (SMLi), and, in the other transmission direction, the parallel/serial conversion takes place on the side of the supermultiplex line (SMo), and a demultiplexer (DM) is provided on the side of the single time-division-multiplex lines (LA0 to LA31). IMAGE