Novel process for preventing the reverse tunneling during programming in split gate flash

摘要

A method is provided to form a split-gate flash memory not susceptible to inadvertent reverse tunneling during programming. This is accomplished by forming a silicon nitride spacer on the negatively tapered walls of the floating gate of the cell which serves as a barrier to reverse tunneling. The negatively tapered walls, in contrast to vertical walls, is disclosed to provide a geometry better suited for forming thicker spacers around the floating gate, which in turn serve to act as a more robust barrier to reverse tunneling. Furthermore, it is shown that the method requires fewer steps than practiced in prior art.