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Process to fabricate a cylindrical, capacitor structure under a bit line structure for a dynamic random access memory cell
Process to fabricate a cylindrical, capacitor structure under a bit line structure for a dynamic random access memory cell
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机译:在位线结构下制造用于动态随机存取存储单元的圆柱形电容器结构的工艺
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摘要
A process for forming a DRAM, cylindrical shaped, stacked capacitor structure, located under a bit line structure, has been developed. The process features defining a polysilicon cell plate structure, during the same photolithotgraphic and anisotropic etching procedures, used to open a bit line contact hole. The bit line contact hole is formed by first opening a top portion of the bit line contact hole, using a photoresist shape as an etch mask, and after the formation of silicon nitride spacers, on the sides of the top portion of the bit line contact hole, the bottom portion of the bit line contact hole is opened, using silicon nitride as an etch mask.
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