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Memory address generator capable of row-major and column-major sweeps

机译:能够进行行主扫描和列主扫描的内存地址生成器

摘要

An improved method and structure for generating addresses of a memory array facilitates the testing of a memory cell by generating the address of any adjacent memory cell to the memory cell under test. The address generation provides for movement to any adjacent memory cell, in any direction, including north, south, east, west, northeast, northwest, southeast, and southwest. The address of any memory cell, even the address of a non-adjacent memory cell, may be selectively generated by exercising a programmable initialization feature.
机译:用于产生存储器阵列的地址的改进的方法和结构通过产生到被测存储器单元的任何相邻存储器单元的地址来促进存储器单元的测试。地址生成可在任何方向(包括北,南,东,西,东北,西北,东南和西南)移动到任何相邻的存储单元。任何存储单元的地址,甚至是不相邻存储单元的地址,都可以通过执行可编程的初始化功能有选择地生成。

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