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Memory address generator capable of row-major and column-major sweeps
Memory address generator capable of row-major and column-major sweeps
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机译:能够进行行主扫描和列主扫描的内存地址生成器
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摘要
An improved method and structure for generating addresses of a memory array facilitates the testing of a memory cell by generating the address of any adjacent memory cell to the memory cell under test. The address generation provides for movement to any adjacent memory cell, in any direction, including north, south, east, west, northeast, northwest, southeast, and southwest. The address of any memory cell, even the address of a non-adjacent memory cell, may be selectively generated by exercising a programmable initialization feature.
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