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System and method for improving logic synthesis in logic circuits
System and method for improving logic synthesis in logic circuits
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机译:用于改善逻辑电路中的逻辑综合的系统和方法
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摘要
A method of fanout optimization includes the steps of inputting a net list including fanout regions, each fanout region having sources, each source being coupled to at least one sink, determining a gain for inverters to be placed in a buffer tree, wherein the gain has a same value for all inverters to be placed within the tree, computing a number of inverters used to couple the source to each sink and introducing inverters into the buffer tree to couple the source to each sink. A system for employing the method of fanout optimization is also described.
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