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MOS transistor with assisted-gates and ultra-shallow amp;ldquo;Psuedoamp;rdquo; source and drain extensions for ultra-large-scale integration
MOS transistor with assisted-gates and ultra-shallow amp;ldquo;Psuedoamp;rdquo; source and drain extensions for ultra-large-scale integration
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机译:具有辅助门和超浅“伪”的MOS晶体管源极和漏极扩展,用于超大规模集成
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摘要
A MOS transistor and a method of fabricating the same for Ultra Large Scale Integration applications includes a composite gate structure. The composite gate structure is comprised of a main gate electrode and two assisted-gate electrodes disposed adjacent to and on opposite sides of the main gate electrode via an oxide layer. Areas underneath the two assisted-gate electrodes form ultra-shallow “pseudo” source/drain extensions. As a result, these extensions have a more shallow depth so as to enhance immunity to short channel effects.
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