ASIC design / manufacturing method, standard cell, embedded array, and multi-chip package

摘要

A manufacturing method for a three-dimensional MCM, having a standard cell or embedded array as a basechip, is provided. On the basechip an external chip is stacked with bumps sandwiching between them. In the case that the standard cell is employed as the base chip, the method comprises the steps of: logic designing a standard cell; designing layout of the macrocell, a bump pad and interconnections on a basechip; fabricating a mask pattern based on the result of designing layout; manufacturing the standard cell on the basechip using the mask pattern; and three-dimensionally assembling an external chip and the basechip via a bump provided on the bump pad. The logic designing is conducted based on a system specification defining various design conditions relating to the standard cell. The designing layout of the macrocell, a bump pad and interconnections on a basechip is conducted using the logic design result, macrocell cell information and bump pad cell information. The present invention also provides an MCM having a base chip which comprises an ASIC, such as a standard cell or an embedded array, manufactured using these automatically designed interconnections and a base chip needed when assembling this MCM. The present invention further provides a storage medium for storing data used in the above step of designing layout.