ASIC design method and ASIC design device

摘要

A method for designing an ASIC has a first step of generating circuit data that includes a large-scale hardware macro made up of primitive macros; a second step of extracting, from the circuit data generated in the first step, wiring data of an external terminal of the large-scale hardware macro, an output of which is in an open state or an input of which is clamped; a third step of performing circuit tracing using the wiring data of the external terminal extracted in the second step; a fourth step of removing wiring data of a redundant primitive macro and redundant wiring data connected to said redundant primitive macros using the wiring data of the external terminal extracted in the second step; a fifth step of generating a temporary library in which a delay time within the macro is adjusted, based on removal results obtained in the fourth step; and a sixth step of performing layout and wiring, and of performing a delay simulation, using the temporary library generated in the fifth step.