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Adaptive delta modulator and demodulator

机译:自适应增量调制器和解调器

摘要

PURPOSE: To reduce data transfer error and to shorten time required for making an analog demodulation signal approximate to an analog input signal being an original signal. ;CONSTITUTION: A delta value increase/decrease judgement unit 3b constituting a demodulator 11 is provided with plural kinds of judgement references. A communication signal level judgement unit 8 judges the signal state of the analog input signal and selects the appropriate judgement reference by the judged result. A storage device 5b which sets the output of an up/down counter 4 as an address stores plural delta values decided by plural delta value increase/ decrease rates as against one output of the up/down counter 4. The delta value decided by the appropriate delta value increase/decrease rate is selected in accordance with the judged result of the communication signal level judgement unit 8. Thus, the data transfer error from a modulator 1 to the demodulator 11 can be reduced, and time required for demodulating a digital modulation signal into the original signal can be shortened.;COPYRIGHT: (C)1995,JPO
机译:目的:减少数据传输错误并缩短使模拟解调信号近似于模拟输入信号即原始信号所需的时间。 ;组成:构成解调器11的增量值增/减判断单元3b具有多种判断基准。通信信号电平判断单元8判断模拟输入信号的信号状态,并根据判断结果选择适当的判断基准。将递增/递减计数器4的输出设置为地址的存储设备5b存储由相对于递增/递减计数器4的一个输出的多个增量值减少/减少率决定的多个增量值。根据通信信号电平判断单元8的判断结果选择增量值增加/减少率。因此,可以减少从调制器1到解调器11的数据传输误差,并且解调数字调制信号所需的时间。可以缩短成原始信号的时间。;版权所有:(C)1995,JPO

著录项

  • 公开/公告号JP3227964B2

    专利类型

  • 公开/公告日2001-11-12

    原文格式PDF

  • 申请/专利权人 松下電器産業株式会社;

    申请/专利号JP19930332594

  • 发明设计人 堅田 智之;

    申请日1993-12-27

  • 分类号H03M3/02;

  • 国家 JP

  • 入库时间 2022-08-22 00:58:54

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